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  ? semiconductor components industries, llc, 2015 june, 2015 ? rev. 0 1 publication order number: NCT375/d NCT375 industry standard digital temperature sensor with 2\wire interface the NCT375 is a two-wire serially programmable temperature sensor with an over-temperature/interrupt output pin to signal out of limit conditions. this is an open-drain pin and can operate in either comparator or interrupt mode. temperature measurements are converted into digital form using a high resolution (12 bit), sigma-delta, analog-to-digital converter (adc). the device operates over the ?55 c to +125 c temperature range. communication with the NCT375 is accomplished via the smbus/i 2 c interface. three address selection pins, a2, a1 and a0, can be used to connect up to 8 NCT375s to a single bus. through this interface the NCT375s internal registers may be accessed. these registers allow the user to read the current temperature, change the configuration settings and adjust the temperature limits. the NCT375 has a wide supply voltage range of 3.0 v to 5.5 v. the average supply current is 575  a at 3.3 v. it also offers a shutdown mode to conserve power. the typical shutdown current is 3  a. the NCT375 is available in three, space saving packages ? 8-lead dfn, 8-lead micro8  and 8-lead soic and is also fully pin and register compatible with the nct75, lm75 and tcn75. features ? 12-bit temperature-to-digital converter ? input voltage range from 3.0 v to 5.5 v ? temperature range from ? 55 c to +125 c ? smbus/i 2 c interface ? overtemperature indicator ? support for smbus/alert ? shutdown mode for low power consumption ? one-shot mode ? available in 8-pin dfn, 8-pin micro8  and soic packages ? these devices are pb-free, halogen free/bfr free and are rohs compliant applications ? computer thermal monitoring ? thermal protection ? isolated sensors ? battery management ? office electronics ? electronic test equipment ? thermostat controls ? system thermal management www. onsemi.com see detailed ordering and shipping information in the package dimensions section on page 13 of this data sheet. ordering information pin assignment (top view) 1 2 3 4 8 7 6 5 v dd a0 a1 a2 sda scl os /alert gnd dfn8 case 506aa soic8 case 751 micro8  case 846a marking diagrams 35m   1 m = date code a = assembly location y = year w = work week  = pb-free package t375 ayw   1 8 a = assembly location l = wafer lot y = year w = work week  = pb-free package NCT375 alyw  1 8 dfn8 micro8  soic8 (note: microdot may be in either location)
NCT375 www. onsemi.com 2 figure 1. simplified block diagram 1 v dd two-wire interface delta-sigma adc control logic registers configuration temperature one-shot t hyst t os 2 5 6 7 8 4 3 os /alert gnd sda scl a2 a1 a0 figure 2. typical application circuit 1 v dd 3.0 v to 5.5 v 2 5 6 7 4 3 os /alert gnd sda scl a2 a1 a0 c bypass address (set as desired) serial interface note: sda, scl and os /alert pins require pull-up resistors to v dd NCT375 table 1. pin function description pin no. pin name description 1 sda smbus/i 2 c serial bi-directional data input/output. open-drain pin; needs a pull-up resistor. 2 scl serial clock input. open-drain pin; needs a pull-up resistor. 3 os /alert over-temperature indicator. open-drain output; needs a pullup resistor. active low output. 4 gnd power supply ground. 5 a2 smbus/i 2 c serial bus address selection pin. connect to gnd or v dd to set the desired i 2 c address. 6 a1 smbus/i 2 c serial bus address selection pin. connect to gnd or v dd to set the desired i 2 c address. 7 a0 smbus/i 2 c serial bus address selection pin. connect to gnd or v dd to set the desired i 2 c address. 8 v dd positive supply voltage, 3.0 v to 5.5 v. bypass to ground with a 0.1  f bypass capacitor.
NCT375 www. onsemi.com 3 table 2. absolute maximum ratings rating symbol value unit supply voltage v dd ? 0.3 to +7 v input voltage on scl, sda, a2, a1, a0 and os /alert . ? 0.3 to v dd + 0.3 v input current on sda, a2, a1, a0 and os /alert . i in ? 1 to +50 ma maximum junction temperature t j(max) 150.7 c operating temperature range t op ? 55 to 125 c storage temperature range t stg ? 65 to 160 c esd capability, human body model (note 1) esd hbm 2,000 v esd capability, machine model (note 1) esd mm 400 v stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 1. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per aec ? q100 ? 002 (eia/jesd22 ? a114) esd machine model tested per aec ? q100 ? 003 (eia/jesd22 ? a115) table 3. operating ranges rating symbol min max unit operating supply voltage v in 3.0 5.5 v operating ambient temperature range t a ? 55 125 c table 4. smbus timing specifications parameter symbol test conditions min typ max unit serial clock frequency f scl dc ? 400 khz start condition hold time t hd:sta 0.6 ? ?  s stop condition setup time t su:sto 90% of scl to 10% of sda 100 ? ? ns clock low period t low 1.3 ? ?  s clock high period t high 0.6 ? ?  s start condition setup time t su:sta 90% of scl to 90% of sda 100 ? ? ns data setup time t su:dat 10% of sda to 10% of scl 100 ? ? ns data hold time (note 2) t hd:dat 10% of scl to 10% of sda 0 ? 76 ns sda/scl rise time t r ? 300 ? ns sda/scl fall time t f ? 300 ? ns minimum reset pulse width t reset 1.3 ? ?  s bus free time between stop & start conditions t buf 1.3 ? ?  s sda time low for reset of serial interface t timeout 75 ? 325 ms functional operation above the stresses listed in the recommended operating ranges is not implied. extended exposure to stresse s beyond the recommended operating ranges limits may affect device reliability. 2. this refers to the hold time when the NCT375 is writing data to the bus. scl sda stop start stop start figure 3. serial interface timing t buf t su;sta t hd;sta t su;sto t su;dat t hd;dat t hd;sta t f t r t high t low
NCT375 www. onsemi.com 4 table 5. electrical characteristics (t a =t min to t max , v dd = 3.0 v to 5.5 v. all specifications for ? 55 c to +125 c, unless otherwise noted.) parameter test conditions min typ max unit temperature sensor and adc accuracy at v dd = 3.0 v to 5.5 v t a =0 c to +70 c t a = ? 25 c to +100 c t a = ? 55 c to +125 c ? ? ? ? ? ? 1 2 3 c adc resolution ? 12 ? bits temperature resolution ? 0.0625 ? c temperature conversion time one-shot mode ? 48.5 ? ms update rate ? 80 ? ms power requirements supply voltage 3.0 ? 5.5 v por threshold 2.75 ? ? v supply current peak current while converting and i 2 c interface inactive ? ? 0.8 ma average current average current over 1 conversion cycle ? 0.44 0.575 ma shutdown mode at 3.3 v supply current in shutdown mode ? 3 12  a os /alert output (open drain) output low voltage, v ol i ol =4ma ? 0.15 0.4 v pin capacitance ? 10 ? pf high output leakage current, ioh os /alert pin pulled up to 5.5 v ? 0.1 5  a digital inputs (sda, scl) input current v in = 0 v to v dd ? ? 1  a input low voltage, v il v dd = 3.3 v (note 3) ? ? 0.3 x v dd v input high voltage, v ih v dd = 3.3 v (note 3) 0.7xv dd ? ? v scl, sda glitch rejection input filtering suppresses noise spikes of less than 50 ns ? ? 50 ns pin capacitance ? 3 ? pf digital output (sda) (open drain) output high current, i oh v oh =5v ? ? 1  a output low voltage, v ol i ol =3ma ? ? 0.4 v output capacitance, c out ? 3 ? pf product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 3. guaranteed by characterization, not production tested.
NCT375 www. onsemi.com 5 application information functional description the NCT375 temperature sensor converts an analog temperature measurement to a digital representation by using an on-chip measurement transistor and a 12 bit delta-sigma adc. the device includes an open drain alert output which can be used to signal that the programmed temperature limit has been exceeded. the two main modes of operation are normal and shutdown mode. in normal mode the NCT375 performs a new temperature conversion every 80 ms. this new value is then updated to the temperature value register (address 0x00) and also compared to the t os register limit (default = 80 c). if the temperature value register is read during the conversion sequence the value returned is the previously stored value. a bus read does not affect the conversion that is in progress. in shutdown mode temperature conversion is disabled and the temperature value register holds the last valid temperature reading. the NCT375 can still be communicated with in this mode as the interface is still active. the device mode is controlled via bit 0 of the configuration register. while in shutdown mode a conversion can be initiated by writing an arbitrary value to the one-shot register (0x04). this has the effect of powering up the NCT375, performing a conversion, comparing the new temperature with the programmed limit and then going back into shutdown mode. the os /alert pin can be configured in many ways to allow it to be used in many dif ferent system configurations. the overtemperature output can be configured to operate as a comparator type output (which is self clearing once the temperature has returned below the hysteresis value) or an interrupt type output (which requires the master to read an internal register and the temperature to return below the hysteresis value before going into an inactive state). the alert pin can also be configured as an active high or active low output. temperature measurement results the results of the on chip temperature measurements are stored in the temperature value register and compared with the t os and t hyst limit register. the temperature value, t os and t hyst registers are 16 bits wide and have a resolution of 0.0625 c. the data is stored as a 12 bit 2s complement word. the data is left justified, d15 is the msb and is the sign bit. the four lsbs (d3 to d0) are always 0 as they are not part of the result. while the adc of the NCT375 can theoretically measure temperatures in the range of ? 128 c to 127 c, the NCT375 is guaranteed to measure from ? 55 c to +125 c. table 6 shows the relevant temperature bits for a 12 bit temperature reading. a 2-byte read is required to obtain the full 12 bit temperature reading. if an 8 bit (1 c resolution) reading is required then a single byte read is sufficient. table 6. 12-bit temperature data format temperature binary value d15 to d4 hex value ? 55 c 1100 1001 0000 0xc90 ? 25 c 1110 0111 0000 0xe70 ? 0.0625 c 1111 1111 1111 0xfff 0 c 0000 0000 0000 0x000 +0.0625 c 0000 0000 0001 0x001 +25 c 0001 1001 0000 0x190 +75.25 c 0100 1011 0100 0x4b4 +100 c 0110 0100 0000 0x640 +125 c 0111 1101 0000 0x7d0 temperature data conversion 12-bit temperature data format positive temperature = adc code (decimal)/16 example 190h = 400d/16 = +25 c negative temperature = (adc code(decimal) ? 4096)/16 example e70h = (3696d ? 4096)/16 = ? 25 c one-shot mode one of the features of the NCT375 is a one-shot temperature measurement mode. this mode is useful if reduced power consumption is a design requirement. to enable one-shot mode bit 5 of the configuration register needs to be set. once, enabled, the NCT375 goes immediately into shutdown mode. here, the current consumption is reduced to a typical value of 3  a. writing address 0x04 to the address pointer register initiates a one-shot temperature measurement. this powers up the NCT375, carries out a temperature measurement, and then powers down again. the data written to this register is irrelevant and is not stored. it is the write operation that causes the one-shot conversion.
NCT375 www. onsemi.com 6 figure 4. one-shot os /alert pin operation os /alert pin (comparator mode) polarity = 0 os /alert pin (interrupt mode) polarity = 0 os /alert pin (comparator mode) polarity = 1 os /alert pin (interrupt mode) polarity = 1 temperature read read read t hyst t os 82 c 81 c 80 c 79 c 78 c 77 c 76 c 75 c 74 c 73 c 72 c fault queue a fault is defined as when the temperature exceeds a pre-defined temperature limit. this limit can be programmed in the t hyst and the t os setpoint registers. bits 3 and 4 of the configuration register determine the number of faults necessary to trigger the os /alert pin. up to six faults can be programmed to prevent false tripping when the NCT375 is used in a noisy temperature environment. in order for the os /alert output to be set these faults must occur consecutively. registers the NCT375 contains six registers for configuring and reading the teperature: the address pointer register, 4 data registers and a one-shot register. the configuration register, the address pointer register and the one-shot register are all 8 bits wide while the temperature register, t hyst and t os registers are all 16 bits wide. all registers, except for the temperature register, can be be read from and written to (the temperature register is read only). the power on state and address of each register are listed in table 9. address pointer register the address pointer register is used to select which register is to respond to a read or write operation. the three lsbs (p2, p1 & p0) of this write only register are used to select the appropriate register. on power up this register is loaded with a value of 0x00 and so points to the temperature register. table 7 shows the bits of the address pointer register and table 8 shows the pointer address selecting each of the registers available. table 7. address pointer register p7 p6 p5 p4 p3 p2 p1 p0 default 0 0 0 0 0 0 0 0 table 8. register addresses selection p2 p1 p0 register selected 0 0 0 stored temperature 0 0 1 configuration 0 1 0 t hyst setpoint 0 1 1 t os setpoint 1 0 0 one-shot table 9. NCT375 register set register address register name power-on default value hex  c 0x00 (r) stored temperature value 0x0000 0 0x01 (r/w) configuration 0x00 ? 0x02 (r/w) t hyst 0x4b00 75 0x03 (r/w) t os 0x5000 80 0x04 (r/w) one-shot 0xxx ?
NCT375 www. onsemi.com 7 temperature register the temperature measured by the parts internal sensor is stored in this 16-bit read only register. the data is stored in twos complement format with the msb as the sign bit. the 8 msbs must be read frist followed by the 8 lsbs. table 10. temperature value register msb lsb d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 0 0 0 0 0 0 0 0 0 x x x x configuration register this 8-bit read/write register is used to configure the NCT375 into its various modes of operation. the different modes are listed in table 11 and explained in more detail below. table 11. configuration register bit configuration default value d7 reserved 0 d6 reserved 0 d5 one-shot mode 0 d4 fault-queue 0 d3 fault-queue 0 d2 os /alert pin polarity 0 d1 cmp/int mode 0 d0 shutdown mode 0 d7: reserved write 0 to this bit. d6: reserved write 0 to this bit. d5: one-shot mode d5 = 0 part is in normal mode and converting every 60 ms. (default) d5 = 1 setting this bit puts the part into one-shot mode. the part is normally powered down in this mode until the one shot register is written to. once this register is written to one conversion is performed and the part returns to its shutdown state. d[4:3]: fault queue d4 d3 these two bits determine how many overtemperature conditions occur before the os /alert pin is triggered. this helps to prevent false triggering of the output. 0 0 = 1 fault (default) 0 1 = 2 faults 1 0 = 4 faults 2 1 = 6 faults d2: os /alert pin polarity this selects the polarity of the os /alert output pin. d2 = 0 output is active low. (default) d2 = 1 output is active high. d1: cmp/int d1 = 0 comparator mode. (default) d1 = 1 interrupt mode. d0: shutdown d0 = 0 normal mode ? part is fully powered. (default) d0 = 1 shutdown mode ? all circuitry except for the smbus interface is powered down. write a 0 to this bit to power up again. t hyst register the t hyst register stores the temperature hysteresis value for the overtemperature output. this value is picked to stop the os /alert pin from being asserted and de-asserted in noisy temperature environments. this limit is stored in the 16 bit register in twos complement format. the msb is the temperature sign bit. the 8 msbs must be read first followed by the 8 lsbs. the default value is +75 c. table 12. t hyst register msb lsb d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 0 1 0 0 1 0 1 1 0 0 0 0 x x x x t os register this register stores the temperature limit at which the part asserts an os /alert . once the measured temperature reaches this value an alert or overtemperature output is generated. the data is stored in twos complement format with the msb as the sign bit. the 8 msbs must be read frist followed by the 8 lsbs. the default limit +80 c.
NCT375 www. onsemi.com 8 table 13. t os register msb lsb d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 0 1 0 1 0 0 0 0 0 0 0 0 x x x x
NCT375 www. onsemi.com 9 serial interface control of the NCT375 is carried out via the smbus/i 2 c compatible serial interface. the NCT375 is connected to this bus as a slave device, under the control of a master device. serial bus address control of the NCT375 is carried out via the serial bus. the NCT375 is connected to this bus as a slave device under the control of a master device. the NCT375 has a 7-bit serial address. the four msbs are fixed and set to 1001 while the 3 lsbs can be configured by the user using pins 5, 6 and 7 (a2, a1 and a0). each of these pins can be configured in one of two ways low or high. this gives eight different address options listed in t able 14 below . the state of these pins is continually sampled and so can be changed after power up. table 14. serial bus address options msbs lsbs address a6 a5 a4 a3 a2 a1 a0 hex 1 0 0 1 0 0 0 0x48 1 0 0 1 0 0 1 0x49 1 0 0 1 0 1 0 0x4a 1 0 0 1 0 1 1 0x4b 1 0 0 1 1 0 0 0x4c 1 0 0 1 1 0 1 0x4d 1 0 0 1 1 1 0 0x4e 1 0 0 1 1 1 1 0x4f the NCT375 also features a smbus/i 2 c timeout function whereby the smbus/i 2 c interface times out after the specified time when there is no activity on the sda line. after this time, the NCT375 resets the sda line back to its idle state (high impedance) and waits for the next start condition. the serial bus protocol operates as follows: 1. the master initiates data transfer by establishing a start condition, defined as a high to low transition on the serial data line sda, while the serial clock line scl remains high. this indicates that an address/data stream is going to follow. all slave peripherals connected to the serial bus respond to the start condition and shift in the next eight bits, consisting of a 7-bit address (msb first) plus a read/write (r/w ) bit, which deternimes the direction of the data transfer i.e. whether data is written to, or read from, the slave device. the peripheral with the address corresponding to the transmitted address responds by pulling the data line low during the low period before the ninth clock pulse, known as the acknowledge bit. all other devices on the bus now remain idle while the selected device waits for data to be read from or written to it. if the r/w bit is a zero then the master writes to the slave device. if the r/w bit is a one then the master reads from the slave device. 2. data is sent over the serial bus in sequences of nine clock pulses, eight bits of data followed by an acknowledge bit from the receiver of data. transitions on the data line must occur during the low period of the clock signal and remain stable during the high period, since a low-to-high transition when the clock is high can be interpreted as a stop signal. 3. when all data bytes have been read or written, stop conditions are established. in write mode, the master pulls the data line high during the tenth clock pulse to assert a stop condition. in read mode, the master overrides the acknowledge bit by pulling the data line high during the low period before the ninth clock pulse. this is known as no acknowledge. the master takes the data line low during the low period before the tenth clock pulse, then high during the tenth clock pulse to assert a stop condition. any number of bytes of data can be transferred over the serial bus in one operation. however, it is not possible to mix read and write in one operation because the type of operation is determined at the beginning and cannot subsequently be changed without starting a new operation. writing data there are two types of writes used in the NCT375: setting up the address pointer register for a register read to read data from a particular register, the address pointer register must hold the address of the register being read. to configure the address pointer register a single write operation (shown in figure 5). it consists of the device address followed by the address being written to the address pointer register. this will then be followed by a read operation. writing data to a register due to the different size registers used by the NCT375, there are two types of write operations. one is for the 8 bit wide configuration register and the other for the 16 bit wide limit registers. figure 6 shows the sequence required to write to the configuration register. it consists of the device address, the data register being written to and the data being written the selected register. the two temperature limit registers (t hyst and t os ) are 16 bits wide and require two data bytes to be written to these registers. this sequence is shown in figure 7. it consists of the device address, the data register being written to and the two data byes being written to the selected register.
NCT375 www. onsemi.com 10 frame 1 serial bus address byte sda scl start by master frame 2 address pointer register byte d7 d6 d5 d4 d3 d2 d1 d0 a6 a5 a4 a3 a2 a1 a0 11 99 stop by master ack. by NCT375 ack. by NCT375 figure 5. writing to the address pointer register r/w d7 d6 d5 d4 d3 d2 d1 d0 frame 3 data byte ack. by NCT375 stop by master sda (continued) scl (continued) frame 1 serial bus address byte ack. by NCT375 sda scl start by master frame 2 address pointer register byte d7 d6 d5 d4 d3 d2 d1 d0 a6 a5 a4 a3 a2 a1 a0 ack. by NCT375 11 99 19 figure 6. writing a register address to the address pointer register, then writing a single byte of data to the configuration register r/w d15 d14 d13 d12 d11 d10 d9 d8 frame 3 data byte ack. by NCT375 (continued) frame 1 serial bus address byte ack. by NCT375 sda scl start by master frame 2 address pointer register byte d7 d6 d5 d4 d3 d2 d1 d0 a6 a5 a4 a3 a2 a1 a0 ack. by NCT375 11 99 19 d7 d6 d5 d4 d3 d2 d1 d0 frame 4 data byte ack. by NCT375 stop by master 19 figure 7. writing to the address pointer register followed by two bytes of data to a 16 bit limit register scl (continued) sda r/w frame 1 serial bus address byte sda scl start by master frame 2 data byte from register d7 d6 d5 d4 d3 d2 d1 d0 a6 a5 a4 a3 a2 a1 a0 11 99 stop by master ack. by NCT375 no ack. by master figure 8. reading data from the configuration register r/w
NCT375 www. onsemi.com 11 d7 d6 d5 d4 d3 d2 d1 d0 frame 3 lsb data from temperature value register no ack. by master stop by master sda (continued) scl (continued) frame 1 serial bus address byte ack. by NCT375 sda scl start by master frame 2 msb data from temperature value register d15 d14 d13 d12 d11 d10 d9 d8 a6 a5 a4 a3 a2 a1 a0 ack. by master 11 99 19 figure 9. reading data from the temperature value register with preset pointer register r/w figure 10. typical pointer set followed by two bytes register read d7 d6 d5 d4 d3 d2 d1 d0 frame 3 lsb data from temperature value register no ack. by master stop by master sda (continued) scl (continued) frame 1 serial bus address byte ack. by NCT375 sda scl repeated start by master frame 2 msb data from temperature value register d15 d14 d13 d12 d11 d10 d9 d8 a6 a5 a4 a3 a2 a1 a0 r/w ack. by master 11 99 1 9 frame 1 serial bus address byte sda scl start by master frame 2 address pointer register byte d7 d6 d5 d4 d3 d2 d1 d0 a6 a5 a4 a3 a2 a1 a0 r/w 11 99 ack. by NCT375 ack. by NCT375
NCT375 www. onsemi.com 12 reading data reading data from the NCT375 is done in two different ways depending on the register being read. the configuration register is only 8 bits wide so a single byte read is used for this (shown in figure 8). this consists of the device address followed by the data from the register. reading the data in the temperature value register requires a two byte read (shown in figure 9). this consists of the device address, followed by two bytes of data from the temperature register (the first byte is the msb). in both cases the address pointer register of the register being read must be written to prior to performing a read operation. os /alert output overtemperature modes the os /alert output pin can operate in two different modes ? overtemperature mode and smbus alert mode. the pin defaults to overtemperature mode on power up. this means that it becomes active when the measured temperature meets or exceeds the limit stored in the t os setpoint register. at this point it can deal with the event in one of two ways which depends on the mode it is in. the two overtemperature modes are: comparator mode and interrupt mode. comparator mode is the default mode on power up. more information on comparator and interrupt modes alsong with the smbus alert mode are explained below. comparator mode in comparator mode, the os /alert pin becomes active when the measured temperature equals or exceeds the limit stored in the t os setpoint register. the pin returns to its inactive status when the temperature drops below the t hyst setpoint register value. note: shutdown mode does not reset the output state for comparator mode. interrupt mode in the interrupt mode, the os /alert pin becomes active when the temperature equals or exceeds the t os limit for a consecutive number of faults. it can be reset by performing a read operation on any register in the NCT375. the output can only become active again when the t os limit has been equalled or exceeded. figure 11 shows how both the interrupt and comparator modes operate in relation to the output pin (os /alert ). it also shows the operation of the polarity bit in the configuration register.
NCT375 www. onsemi.com 13 82 c figure 11. os /alert output temperature response diagram t os t hyst temperature 81 c 80 c 79 c 78 c 77 c 76 c 75 c 74 c 73 c 72 c os /alert pin (comparator mode) polarity = 0 os /alert pin (interrupt mode) polarity = 0 os /alert pin (comparator mode) polarity = 1 os /alert pin (interrupt mode) polarity = 1 read read read table 15. ordering information model number temperature range temperature accuracy package description package option ? NCT375dmr2g ? 55 c to +125 c 1 c micro8 (pb ? free) 3,000 / tape & reel NCT375dr2g ? 55 c to +125 c 1 c soic ? 8 (pb ? free) 2,500 / tape & reel NCT375mnr2g ? 55 c to +125 c 1 c dfn8 (pb ? free) 3,000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
NCT375 www. onsemi.com 14 package dimensions ?? ?? case 506aa issue e notes: 1. dimensioning and tolerancing per asme y14.5m, 1994 . 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.20 mm from terminal tip. 4. coplanarity applies to the exposed pad as well as the terminals. a d e b c 0.10 pin one 2x reference 2x top view side view bottom view a l (a3) d2 e2 c c 0.10 c 0.10 c 0.08 note 4 a1 seating plane e/2 e 8x k note 3 b 8x 0.10 c 0.05 c a b b dim min max millimeters a 0.80 1.00 a1 0.00 0.05 a3 0.20 ref b 0.20 0.30 d 2.00 bsc d2 1.10 1.30 e 2.00 bsc e2 0.70 0.90 e 0.50 bsc k l 0.25 0.35 1 4 8 5 *for additional information on our pb-free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 2.30 0.50 0.50 8x dimensions: millimeters 0.30 pitch 8x 1 package outline recommended l1 detail a l optional constructions l ??? 0.10 0.30 ref 0.90 1.30
NCT375 www. onsemi.com 15 package dimensions soic ? 8 nb case 751 ? 07 issue ak seating plane 1 4 5 8 n j x 45  k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m  1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155  mm inches  scale 6:1 *for additional information on our pb-free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint*
NCT375 www. onsemi.com 16 package dimensions micro8  case 846a ? 02 issue h s b m 0.08 (0.003) a s t notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. 846a-01 obsolete, new standard 846a-02. b e pin 1 id 8 pl 0.038 (0.0015) ? t ? seating plane a a1 c l *for additional information on our pb-free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 8x 8x 6x  mm inches  scale 8:1 1.04 0.041 0.38 0.015 5.28 0.208 4.24 0.167 3.20 0.126 0.65 0.0256 dim a min nom max min millimeters ?? ?? 1.10 ?? inches a1 0.05 0.08 0.15 0.002 b 0.25 0.33 0.40 0.010 c 0.13 0.18 0.23 0.005 d 2.90 3.00 3.10 0.114 e 2.90 3.00 3.10 0.114 e 0.65 bsc l 0.40 0.55 0.70 0.016 ?? 0.043 0.003 0.006 0.013 0.016 0.007 0.009 0.118 0.122 0.118 0.122 0.026 bsc 0.021 0.028 nom max 4.75 4.90 5.05 0.187 0.193 0.199 h e h e d d e publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 NCT375/d micro8 is a trademark of international rectifier. literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warrant y, representation or guarantee regarding the suitability of it s products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner.


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